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g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 1 - features : description : * low-power consumption. - active: 30ma icc at 55ns. -stand by : 10 m a (cmos input / output , ll) 2 m a (cmos input / output, sl) * single +2.7v to 3.6v power supply. * equal access and cycle time. * 55\70\85 ns access time. * tri-state output. * automatic power-down when deselected. * multiple center power and ground pins for improved noise immunity. * individual byte controls for both read and write cycles. * industrial grade (-40 c ~ 85 c) available. * available in 48-fpbga/44l tsopii. the glt6200l16 is a low power cmos static ram organized as 131,072 words by 16 bits. easy memory expansion is provided by an active low ce1 and oe pin. this device has an automatic power ? down mode feature when deselected. separate byte enable controls ( ble and bhe ) allow individual bytes to be accessed. ble controls the lower bits i/o0 ? i/o7. bhe controls the upper bits i/o8 ? i/o15. writing to these devices is performed by taking chip enable ce1 with write enable we and byte enable ( ble / bhe ) low reading from the device is performed by taking chip enable ce1 with output enable oe and byte enable ( ble / bhe ) low while write enable we and ce2 are held high. function block diagram : row select memory array 1024 x 2048 pre-charge circuit i/o circuit column select data circuit data circuit vcc vss we oe ble bhe ce1 i/o 8 - i/o 15 i/o 0 - i/o 7 control logic column address row address
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 2 - bhe pin configurations : glt6200l16 a 4 1 2 3 4 5 6 7 9 10 12 13 14 vcc 8 15 16 17 18 19 20 21 24 25 26 27 28 29 30 31 32 33 35 36 37 38 39 40 41 42 43 44 ce1 i/o 0 oe ble 22 23 34 11 vcc we a 3 a 2 a 1 a 0 i/o 1 i/o 2 i/o 3 vss i/o 4 i/o 5 i/o 6 i/o 7 a 16 a 15 a 14 a 13 a 11 a 10 a 9 a 8 nc i/o 8 i/o 9 i/o 10 i/o 11 vss i/o 12 i/o 13 i/o 14 i/o 15 bhe a 7 a6 a 5 a 12 nc 48 ball fpbga : 1 2 3 4 5 6 7 8 a b c d e f g h ? ? ? ? ? ? ? ? 1 ble i/o8 i/o9 vss vcc i/o14 i/o15 nc ? ? ? ? ? ? ? ? 2 oe i/o10 i/o11 i/o12 i/o13 nc a8 ? ? ? ? ? ? ? ? 3 a0 a3 a5 nc nc a14 a12 a9 ? ? ? ? ? ? ? ? 4 a1 a4 a6 a7 a16 a15 a13 a10 ? ? ? ? ? ? ? ? 5 a2 ce1 i/o1 i/o3 i/o4 i/o5 we a11 ? ? ? ? ? ? ? ? 6 nc i/o0 i/o2 vcc vss i/o6 i/o7 nc note : nc means no ball. pin descriptions: name function a 0 ? a 16 address inputs ce 1 chip enable input oe output enable input we write enable input i/o 0 ? i/o 15 data input and data output v cc 2.7v~3.6v power supply ble lower byte enable input ( i/o 0 to i/o 7 ) bhe higher byte enable input ( i/o 8 to i/o 15 ) gnd ground nc no connection
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 3 - truth table: ce1 oe we ble bhe i/o0-i/o7 i/o8-i/o15 power mode h x x x x high-z high-z standby deselected x x x x x high-z high-z standby deselected x x x h h high-z high-z standby deselected l h h l x high-z high-z active output disabled l h h x l high-z high-z active output disabled l l h l h data out high-z active lower byte read l l h h l high-z data out active upper byte read l l h l l data out data out active word read l x l l h data in high-z active lower byte write l x l h l high-z data in active upper byte write l x l l l data in data in active word write note ; x means don care. (must be low or high state). absolute maximum ratings* parameter symbol minimum maximum unit voltage on any pin relative to gnd vt -0.5 vcc + 0.3 v power dissipation p t - 1.0 w storage temperature (plastic) tstg -55 +150 c temperature under bias tbias -25 +85 c *note : stresses greater than those listed above absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any conditions outside those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. recommended operating conditions ( ta = -25 c to 85 c ) parameter symbol min typ max unit v cc 2.7 3 3.6 v supply voltage gnd 0.0 0.0 0.0 v v ih 2.2 - v cc +0.2 v input voltage v il -0.5* - 0.6 v * v il min = -2.0v for pulse width less than t rc /2.
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 4 - dc operating characteristics ( vcc=2.7 to 3.6v, t a = -25 c to 85 c ) 55 70 85 unit parameter sym. test conditions min max min max min max input leakage current ? i li ? v cc = max, vin = gnd to v cc 1 1 1 m a output leakage current ? i lo ? ce1 =v ih or v cc = max, v out = gnd to v cc 1 1 1 m a operating power supply current i cc ce1 =v il ,v in =v ih or v il , i out =0 5 5 5 ma i cc1 i out = 0ma, min cycle, 100% duty 30 30 25 ma average operating current i cc2 ce1 0.2v i out = 0ma, cycle time=1 m s, 100% = duty 3 3 3 ma standby power supply current(ttl level) i sb ce1 =v ih 0.5 0.5 0.5 ma glt6200l16ll 10 10 10 m a standby power supply current (cmos level) i sb1 ce1 3 v c c - 0.2v v in 0.2v or v in 3 v cc -0.2v glt6200l16sl 2 2 2 m a output low voltage v ol i ol = 2.1 ma 0.4 0.4 0.4 v output high voltage v oh i oh = -1 ma 2.4 2.4 2.4 v data retention parameter sym. test conditions min. max. unit v cc for data retention v dr 1.0 - v data retention current i ccdr - 2 m a chip deselect to data retention time t cdr 0 - ns operating recovery time (2) t r ce1 3 v cc -0.2v v in 3 v cc -0.2v or v in 0.2v t rc - ns data retention waveform (ta = -25 c to +85 c) data retention mode vcc ce1 v dr v dr >= 1.0v t r t cdr 2.7v 2.7v v ih v ih
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 5 - ac test conditions ac test loads and waveforms c l * ttl output load condition *including scope and jig capacitance c l = 30pf + 1ttl load read cycle (9) ( vcc=2.7v to 3.6v, t a = -25 c to 85 c ) 55 70 85 parameter symbol min max min max min max unit note read cycle time t rc 55 70 85 ns address access time t aa 55 70 85 ns chip enable access time t ace 55 70 85 ns output enable access time t oe 35 40 40 ns output hold from address change t oh 10 10 10 ns chip enable to output in low-z t lz 10 10 10 ns 4,5 chip disable to output in high-z t hz 25 30 35 ns 3,4,5 output enable to output in low-z t olz 5 5 5 ns output disable to output in high-z t ohz 25 25 30 ns ble , bhe enable to output in low-z t blz 5 5 5 ns 4,5 ble , bhe disable to output in high-z t bhz 25 25 30 ns 3,4,5 ble , bhe access time t ba 35 40 85 ns timing waveform of read cycle 1 (address controlled) d out t rc address t oh t aa previous data valid data valid input pulse levels 0.4v to 2.4v input rise and fall time input and output timing reference level 5 ns 1.4v
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 6 - timing waveform of read cycle 2 (3~5) d out t rc address t ace t aa t lz t oe t ba t olz t blz t hz t bhz t ohz t oh data valid high - z ce1 ub / lb oe write cycle (11) ( vcc=2.7 to 3.6v, t a = -25 c to 85 c ) 55 70 85 parameter symbol min max min max min max unit note write cycle time t wc 55 70 85 ns chip enable to write end t cw 50 60 70 ns address setup to write end t aw 50 60 70 ns address setup time t as 0 0 0 ns write pulse width t wp 45 50 60 ns write recovery time t wr 0 0 0 ns data valid to write end t dw 25 30 35 ns data hold time t dh 0 0 0 ns write enable to output in high-z t whz 25 30 35 ns output active from write end t ow 5 5 5 ns ble , bhe setup to write end t bw 50 60 70 ns
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 7 - timing waveform of write cycle 1 (address controlled) (2~6,8) d out t wc address t aw t wr ce1 ub / lb we t cw t bw t as t wp t dw t dh t ow high-z high-z d in timing waveform of write cycle 2 ( ce1 controlled) (2~6,8) d out t wc address t aw t wr ce1 ub / lb we t cw t as t bw t wp t dw t dh t whz t lz high - z high - z high - z d in
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 8 - timing waveform of write cycle 4 ( ub / lb controlled) (2~6,8) d out t wc address t aw t wr ce1 ub / lb we t cw t as t bw t wp t dw t dh t whz t blz high - z high - z high - z d in
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 9 - notes : 1. l-version includes this feature. 2. this parameter is samples and not 100% tested. 3. for test conditions, see ac test condition. 4. this parameter is tested with cl = 5pf. transition is measured 500mv from steady ? state voltage. 5. this parameter is guaranteed, but is not tested. 6. we is high for read cycle. 7. ce1 and oe are low and ce2 is high for read cycle. 8. address valid prior to or coincident with ce1 transition low or ce2 transition high. 9. all read cycle timings are referenced from the last valid address to the first transition address. 10. ce1 or we must be high or ce2 must be low during address transition. 11. all write cycle timings are referenced from the last valid address to the first transition address.
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 10 - ordering information part number speed power package glt6200l16ll-55tc 55ns normal tsopii 44l glt6200l16ll-70tc 70ns normal tsopii 44l glt6200l16ll-85tc 85ns normal tsopii 44l glt6200l16lli-55tc 55ns normal tsopii 44l glt6200l16lli-70tc 70ns normal tsopii 44l glt6200l16lli-85tc 85ns normal tsopii 44l glt6200l16sl-55tc 55ns normal tsopii 44l glt6200l16sl-70tc 70ns normal tsopii 44l glt6200l16sl-85tc 85ns normal tsopii 44l glt6200l16sli-55tc 55ns normal tsopii 44l glt6200l16sli-70tc 70ns normal tsopii 44l glt6200l16sli-85tc 85ns normal tsopii 44l glt6200l16ll-55fg 55ns normal fpbga 48l glt6200l16ll-70fg 70ns normal fpbga 48l glt6200l16ll-85fg 85ns normal fpbga 48l glt6200l16lli-55fg 55ns normal fpbga 48l glt6200l16lli-70fg 70ns normal fpbga 48l glt6200l16lli-85fg 85ns normal fpbga 48l glt6200l16sl-55fg 55ns normal fpbga 48l glt6200l16sl-70fg 70ns normal fpbga 48l glt6200l16sl-85fg 85ns normal fpbga 48l glt6200l16sli-55fg 55ns normal fpbga 48l glt6200l16sli-70fg 70ns normal fpbga 48l glt6200l16sli-85fg 85ns normal fpbga 48l
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 11 - parts numbers (top mark) definition : glt 6 200 l 16 ll i - 55 tc 4 : dram 5 : synchronous dram 6 : standard sram 7 : cache sram 8 : synchronous burst sram 9 : sgram -sram 064 : 8k 256 : 256k 512 : 512k 100 : 1m -dram 10 : 1m(c/edo) 11 : 1m(c/fpm) 12 : 1m(h/edo) 13 : 1m(h/fpm) 20 : 2m(edo) 21 : 2m(fpm) 40 : 4m(edo) 41 : 4m(fpm) 80 : 8m(edo) 81 : 8m(fpm) 160 : 16m(edo) 161 : 16m(fpm) 640 : 64m(edo) 641 : 64m(fpm) -sdram 40 : 4m 160 : 16m 640 : 64m voltage blank : 5v l : 3.3v m : 2.5v n : 2.1v config. 04 : x04 08 : x08 16 : x16 32 : x32 speed -sram 12 : 12ns 15 : 15ns 20 : 20ns 70 : 70ns -dram 30 : 30ns 35 : 35ns 40 : 40ns 45 : 45ns 50 : 50ns 60 : 60ns sdram : 5 : 5ns/200 mhz 5.5 : 5.5ns/182 mhz 6 : 7ns/166 mhz 7 : 8ns/125 mhz 10 : 10ns/100 mhz package t : pdip(300mil) ts : tsop(type i) st : stsop(type i) tc : tsopll (40/44) td : tsopii (44/50) pl : plcc fa : 300mil sop fb : 330mil sop fc : 445mil sop j3 : 300mil soj j4 : 400mil soj p : pdip(600mil) q : pqfp tq : tqfp fg : 48pin bga 9x12 fh : 48pin bga 8x10 fi : 48pin bga 6x8 power blank : standard l : low power ll : low low power sl : super low power temperature range e : extended temperature i : industrial temperature blank : commercial temperature
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 12 - package information 44 pin small outline j-form package (tsopii)
g-link glt6200l16 ultra low power 128k x 16 cmos sram may 2001(rev. 2.3) g-link technology corporation 2701 northwestern parkway santa clara, ca 95051, u.s.a. g-link technology corporation, taiwan 6f no. 24-2, industry e. rd. iv, science based industrial park, hsin chu, taiwan. - 13 - glt6200l16 fpbga abcdefgh 1 2 3 4 5 6 oooooooo oooooooo oooooooo oooooooo oooooooo oooooooo package outline dwg. symbol unit : mm a 1.10 0.1 a1 0.22 0.05 ? b 0.35 c 0.36typ d 8.00 0.10 d1 5.25 e 6.00 0.10 e1 3.75 e 0.75typ aaa 0.10 d1 d e1 e aaa a1 c a ? b e

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